Abstract

We present a convenient and practical electromagnetic (EM) assisted small-signal model extraction method for InP double-heterojunction bipolar transistors (DHBTs). Parasitic parameters of pad and electrode fingers are extracted by means of 3D EM simulation. The simulations with a new excitation scheme are closer to the actual on-wafer measurement conditions. Appropriate simulation settings are calibrated by comparing measurement and simulation of OPEN and SHORT structures. A simpler π-type topology is proposed for the intrinsic model, in which the base-collector resistance Rμ , output resistance R ce are deleted, and a capacitance C ce is introduced to characterize the capacitive parasitic caused by the collector finger and emitter ground bar. The intrinsic parameters are all extracted by exact equations that are derived from rigorous mathematics. The method is characterized by its ease of implementation and the explicit physical meaning of extraction procedure. Experimental validations are performed at four biases for three InGaAs/InP HBT devices with 0.8 × 7 μm, 0.8 × 10 μm and 0.8 × 15 μm emitter, and quite good fitting results are obtained in the range of 0.1–50 GHz.

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