An efficient and reliable MRF-based methodology for designing low-power VLSI circuits

Abstract

Noise-interference is one of the major concerns in low-power VLSI circuits. Due to power supply downscaling, these circuits have an extremely limited noise margin that is inadequate for dealing with intrinsic and extrinsic noise. The MRF-based design has been accepted as a highly effective method for designing noise-tolerant low-power circuits. However, the MRF-based circuits suffer from a complex structure and the methods which tried to simplify the structure always sacrificed the noise immunity for hardware simplicity. In this paper, we propose a novel MRF-based method for designing efficient and reliable low-power VLSI circuits. For the first time, an innovative reliability boosting mechanism based on maximum conditional correct probability is incorporated into an efficient MRF-based structure which leads to highly reliable circuits with considerably low cost, delay, and power consumption. The proposed method demonstrates the best performance among all of the previously reported methods. Moreover, the Monte Carlo simulations confirm that the proposed method can preserve its superior noise immunity even under serious process, voltage, and temperature variations.