An Automatic SoC Design Methodology for Integration and Verification

Abstract

The increasing complexity of current SoC design brings a great challenge to SoC designer for fast SoC RTL integration and effective verification. In this paper, an automatic SoC integration methodology based on IP-XACT standard is proposed as a complete and effective solution for low-level RTL simulation, FPGA emulation and ASIC implementation. A bottom-up approach is adopted for design integration and verification from component level, to SoC core level, and then to final chip level. The three-core MPSoC case study not only gives the detailed usage and analysis on the proposed methodology, but also shows its efficiency to integrate a complex SoC design and its feasibility for correct SoC implementation.