FPGA verification methodology for SiSoC based SoC design

Abstract

This paper proposes an efficient FPGA verification methodology for SiSoC-based SoC design. FPGA-based verification platform is an effective way to verify the SoC design, and it is becoming very important to build a prototype of the SoC design in FPGA. SiSoC is a high-performance and low-power processor. The SiSoC-based SoC design adopts AMBA bus to connect SiSoC processor to peripheral IPs and external memory system. FPGA-based verification platform can improve the time-to-market and help avoid costly re-spins by enabling early embedded software development and allowing hardware and software co-verification well ahead of chip fabrication.