An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of PhaseAccumulator Truncation

Abstract

An algorithm is presented for the calculation of the spectrum of direct digital frequency synthesizers (DDFS'B) as a result of phase accumulator truncation. This algorithm. which is derived using number theoretic methods. includes a dosed form expression, relating the magnitude, number, and position of the spurious noise lines in the output spectrum at a DDFS to the read-only memory (ROM) look-up table size, the amount of phase accumulator truncation and the input frequency control command. The combined finite word length effects of the ROM and the Digital-to-Analog converter (DAC) nonlinearities are also examined in the light of these new results and new design guidelines are developed. The spectrums predicted by these closed form expressions are compared against spectrums generated by a discrete Fourier transform (DFT) and are shown to have comparable accuracy. As a result of obtaining an expression for the magnitude of the spurious noise frequencies, a relationship between the greatest common divisor at the input frequency command word and the ROM table size, the phase accumulator word lengths, and the magnitude of the worst case sput is obtained. This relationship is used as the basis for a novel modification to the conventional phase accumulator structure which results in a 3.922dB reduction in the magnitude of the worst ease spurious response. This hardware modification is also shown to average out the error effects of DAC nonlinearities and roundoff in the stored sine ROM samples.