Abstract
This paper presents a novel high output power class H audio amplifier design with GaN transistors output stage. The design is implemented in 0.18-$\mu$m BCD process. Several design techniques to drive the GaN output stage and to improve the efficiency of the class H amplifier are introduced in this paper. The design consumes 706.3mW quiescent power and can deliver up to 37W peak output power to the load of 32$\Omega$ with the peak power efficiency of 87%. This design achieves the lowest THD+N ratio of -70.17dB.
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