All–MOS self-powered subthreshold voltage reference with enhanced line regulation

Abstract

A nano-watt self-powered voltage reference configuration has been developed for the integrated microsystems in standard CMOS technology. The circuit is highly immune to temperature variations, and can be made very insensitive to the power supply glitches originating from the simple regulation mechanisms used to harvest energy from the environment. The proposed reference is an all-MOS topology without operational amplifier or on-chip resistors, generating a stable output with excellent line regulation owing to the modifications proposed to suppress the line voltage variations. All the MOS devices are working in weak inversion to ensure operation at nano-ampere current levels. Simulated in 0.18-µm standard CMOS process, a prototype of the proposed reference consumes an overall power of 14 nW at 0.7 V minimum supply. The average voltage reference is 255 mV with an average temperature coefficient of 17.05 ppm/°C across −40 °C to +125 °C. The line regulation is 0.00797%/V and 0.00456%/V, respectively, when the reference is subjected to a line voltage of 0.9–2.0 V and 1.0–2.0 V. The power supply rejection ratio is −110 dB, −91 dB and −68 dB for 0.1 Hz, 10 Hz, and 1 MHz at room temperature, respectively.