Advancements, Versatility, and Flexibility of Dual-Layer Material System for Advanced Packaging Applications

Abstract

Integrated circuits (IC) have seen a major shift in development within the past 10-20 years with traditional lithography methods showing a drastic increase in development time for more advanced nodes, as well as an exponential increase in cost to achieve the same performance gains as before. The increase in cost and the decline in development in lithography have resulted in looking at advanced packaging technologies to achieve the same performance gains by changing the way IC design is approached. The look towards advanced packaging technologies for the future in terms of increasing performance for a substantially lower cost has resulted in considering the IC as a system of components working intertwined with each other rather than as individual components. This shift in mindset has resulted in technologies such as system in package (SiP), package on package (PoP), and fan-out wafer-level packaging (FOWLP). One advanced packaging technology that plays a critical role enabling these aforementioned technologies is temporary bond and debond (TB/DB). TB/DB’s crucial role in advanced packaging is due to the enablement of backside processing such as wafer thinning, bumping of the wafer, die stacking, and chemical vapor deposition/physical vapor deposition (CVD/PVD)–type processes by the use of a support carrier wafer. The support carrier wafer also allows for the use of highly warp-prone materials such as epoxy mold compound (EMC), which are critical in FOWLP applications, by reducing the overall warpage of the entire wafer stack. To utilize the support carrier wafer, a robust material solution is required to allow for the wafers to be bonded together and subsequently released after backside processing by one of the primary separation methods of thermal slide, mechanical, or laser debond. Brewer Science has designed and developed a dual-layer temporary bonding system. This system consists of two materials, a thermoplastic layer that is typically coated on the device, and a thermoset layer which is typically coated on the carrier. The materials developed for the dual-layer system demonstrate very good performance in very high temperature applications, EMC wafer handling, and device thinning to sub-20 µm. In this paper, we will summarize their capabilities and introduce how adhesion between the two temporary layers can be adjusted by material design. We will also cover a new feature of the thermoset layer that can be patterned to allow for the use of a patterned bonding material for TB/DB-type applications.