Abstract

In recent years, the in-memory-computing in charge domain has gained significant interest as a promising solution to further enhance the energy efficiency of neuromorphic hardware. In this work, we explore the synergy between the brain-inspired computation and the adiabatic paradigm by presenting an adiabatic Leaky Integrate-and-Fire neuron in 180 nm CMOS technology, that is able to emulate the most important primitives for a valuable neuromorphic computation, such as the accumulation of the incoming input spikes, an exponential leakage of the membrane potential and a tunable refractory period. Differently from previous contributions in the literature, our design can exploit both the charging and recovery phases of the adiabatic operation to ensure a seamless and continuous computation, all the while exchanging energy with the power supply with an efficiency higher than 90% over a wide range of resonance frequencies, and even surpassing 99% for the lowest frequencies. Our simulations unveil a minimum energy per synaptic operation of 470 fJ at a 500 kHz resonance frequency, which yields a 9x energy saving with respect to a non-adiabatic operation.

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