Accelerated concurrent fault simulation by analyzing detected faults

Abstract

In this paper two methods are proposed for accelerating concurrent fault simulation (FSIM). In FSIM, processing for propagating fault lists becomes complex at reconvergent gates. In the first method, the acceleration is achieved by analyzing detected faults and changing reconvergent gates to nonreconvergent gates. In FSIM, as the fault coverage increases and a large number of faults are detected, fewer input patterns can detect new faults. The second method accelerates FSIM by terminating the simulation when it becomes clear that no more new faults can be detected. Also it is terminated sooner by changing the order of signal lines to be processed. These methods have been implemented and computational experiments have been conducted on ISCAS'85 benchmark circuits. The results show that when the two methods are combined, the execution time of RTG for FSIM is accelerated by a factor of 1.2–1.4 except for C3540 and C6288. The execution time of 2000 simulations after RTG is improved by a factor of 1.3 to 2.4. The computation time of each method is small. © 1997 Scripta Technica, Inc. Syst Comp Jpn, 28(4): 68–74, 1997