Abstract
The wafer-scale 170000-gate fast Fourier transform (FFT) processor has three features: a single repeatable building block containing a processing element (PE) and its interconnects, mask-programmable routing by the placement of contact holes, and a built-in self-test (BIST) for the PE and its interconnects. The wafer system is composed of 48 PEs selected out of a total of 88 PEs. The PE consists of a 2800-gate multiplier-accumulator and 700-gate BIST circuitry. The processor performs parallel 16-bit, 8-point complex FFT and is implemented with 725 I/O pads in triple-metal 2.3- mu m CMOS technology on a 4-inch wafer. This wafer is mounted face down on an 11.8*11.8-cm/sup 2/ substrate by solder bumps. >
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