Abstract
A versatile CMOS current sensing device is proposed as a built-in self-test (BIST) monitor for conventional digital I/sub DDQ/ power supply current test. A novel sensor topology is successfully employed in a current monitoring testing scheme. The sensor is implemented in two CMOS processes, 0.13 /spl mu/m and 0.18 /spl mu/m with 1.2-V and 1.8-V power supply, respectively. For verification purposes, performances of the 0.13-/spl mu/m design are investigated on several types of digital circuits: 64-bit RCA adder, 16-bit register, and inverter chain. Our analysis shows excellent detection capabilities of noncatastrophic short and open defects. Overall performance penalty and power supply degradation of the circuit under test are evaluated on 1.2-V 500-gate, 1000-gate, and 2000-gate asynchronous digital logic. Average power supply degradation of the 2000-gate logic tested at 20 MHz is recorded to be less than 0.6% which produced a 250-ps delay in the 100-gate critical path. The presented sensor is a scalable and practical embedded solution for high-frequency parametric I/sub DDQ/ test of standard CMOS digital circuits.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: IEEE Transactions on Instrumentation and Measurement
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.