Abstract

The controller of a current-mode buck converter is realized by only time-domain circuits such as voltage-controlled oscillator (VCO), voltage-controlled delay line (VCDL), and phase detector (PD). The inductor current is sensed by a VCO, which helps improving power efficiency and eliminates the need for the slope compensation preventing the sub-harmonic oscillation. The type-II frequency compensation network is realized by a combination of VCO and VCDL without an error amplifier (EA) and RC network which may consume large power and occupy large silicon area. Instead of voltage comparator, a PD detects the error of the output voltage, which allows the switching duty cycle and thus the output voltage to be controlled in a wide range. With the proposed time-domain current-mode controller, a buck converter has been implemented in a 65-nm CMOS process. The output voltage can be regulated from 0.15 to 1.69 V from a 1.8-V input and the maximum load current is 0.6 A. The peak power efficiency is 94.9% when the output is 1.5 V and the load current is 250 mA. The load transient speed is better than 3.5 $\mu \text{s}$ for both the step-up and step-down changes of the load current by 480 mA in 0.1 $\mu \text{s}$ .

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