A Three‐Layer Resist System for Deep U.V. and RIE Microlithography on Nonplanar Surfaces

Abstract

The three‐layer resist system AZ1350J/Si/PMMA was used to define high‐resolution patterns on nonplanar surfaces with topographical features typically encountered in the fabrication of VLSI circuits. The substrate was coated successively with a thick layer of polymethyl methacrylate (PMMA) for planarization, a thin layer of amorphous silicon for masking, and a thin AZ1350J resist layer in which the optical or electron beam exposed pattern was defined. Transfer of the resist image pattern into the amorphous silicon film was performed anisotropically by reactive ion etching (RIE) in a plasma. The pattern in the Si layer was then replicated in the underlying PMMA layer either by blanket deep u.v. exposure (200–300 nm) and solvent development or by in situ RIE in an plasma. Both patterning techniques were comparable in defining submicrometer features in PMMA films 1–3 μm thick with good linewidth control and high aspect ratio over steps 1 μm high. Experimental details are described and the complexity of deep u.v. and RIE patterning techniques are discussed with particular emphasis on the planarizing characteristics of PMMA.