A Single-Trim Switched Capacitor CMOS Bandgap Reference With a 3σ Inaccuracy of +0.02%, −0.12% for Battery-Monitoring Applications

Abstract

This article presents a single-trim switched capacitor (SC) CMOS bandgap reference (BGR) for battery monitoring applications. For a single-temperature trimming, β-compensation and curvature correction techniques are employed to minimize non-proportional-to-absolute-temperature (PTAT) errors. In conjunction with these techniques, this article proposes dynamic element matching (DEM) techniques with low-pass filtering which employs the decimation filter of a delta-sigma analog-to-digital converter (ADC) in a digital domain. It achieves a further reduction of non-PTAT errors resulting from mismatches of the bias current, of the PNP transistor current gain ( β), and of the gain coefficient in the SC summing amplifier. The remaining PTAT errors are canceled out using a single room-temperature trimming. The bandgap circuit is implemented using vertical PNP transistors with a β of about 2.7 at 27 °C in a 0.18- μm CMOS process. The proposed SC BGR achieves a 3σ inaccuracy of +0.02%, -0.12% from -40 °C to 125 °C. From a 1.8-V supply voltage, it consumes 17 μA at 27 °C and occupies an active area of 0.38 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .