Abstract
A voltage-controlled oscillator (VCO) is an essential part of the clock circuitry in satellite communication systems. Low-dropout regulators (LDO) provide stable voltage supply to the VCO and inevitably bring in new radiation-sensitive nodes. In this paper, by conducting single-event transient (SET) sensitivity analysis of LDO in voltage-regulated VCO, we find the sensitive nodes of LDO in oscillation circuits located on the relevant transistors that determine the bias voltage of the tail transistor in the error amplifier (EA). To immunize SET, a symmetrical hardening method combining sensitive node splitting and resistive-decoupling is proposed for the sensitive nodes. This method achieves 80.8% analog single-event transient (ASET) mitigation. This study was conducted in 28-nm CMOS process.
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