A self-restored current-mode CMOS multiple-valued logic design architecture

D.H.Y Teng,R.J Bolton

doi:10.1109/pacrim.1999.799569

A self-restored current-mode CMOS multiple-valued logic design architecture

D.H.Y Teng, R.J Bolton

https://doi.org/10.1109/pacrim.1999.799569

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Publication Date: Aug 22, 1999

Citations: 17

#Multiple-valued Logic #Multiple-valued Logic Design + Show 8 more

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Abstract

This paper discusses a self-restored architecture for current-mode CMOS multiple-valued logic (MVL) design. The self-restored architecture is characterized by using both current-mode MVL circuits and voltage-mode binary circuits to implement MVL functions and to restore output signals simultaneously. Binary gates are used within the design architecture so that MVL-binary or binary-MVL conversion circuits are not required to interface with binary circuits. The average size of the resulting circuits is smaller than those using standard MVL operators.

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