Abstract

The scalability of bulk CMOS faced various possible issues due to inherent material and process innovation constraints. Alternatively, transistor devices with supplementary gates, such as the Fin Field-effect transistor (FinFET) structure has attracted developing interest during the last few generations of their emergence, attributable to the appropriate control of the gate electrode over subthreshold parameters and seem to be favorable for Ultra large-scale integration, resulting in excessive immune function to short-channel effects (SCEs). In this paper, we will see the effect of several types of high-k gate dielectrics materials i.e Hafnium oxide (HfO2), Lanthanum doped zirconium oxide (LaZrO2), Silicon dioxide (SiO2), crystalline-silicon (c-Si), and polycrystalline-silicon (poly-Si), etc. channels are characterized for the short channel effects (SCEs), leakage current, Ion/Ioff ratio, drain induced barrier lowering (DIBL), and subthreshold swing (SS). The effect of important device parameters is considered regarding SCEs. The variation of the materials indicates improvements for the SCEs in FinFETs device architecture and also enhanced effective carrier mobility. Hence, we can clearly see that the use of high-k gate material has allowed for effective control of the diminishing of short channel effects.

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