A Reconfigurable Spectrum-Compressing Receiver for Non-Contiguous Carrier Aggregation in CMOS SOI

Abstract

This article demonstrates a signal processing technique for receiving non-contiguous RF channels by concurrently mixing several RF bands to adjacent IF channels. Consequently, channel selection does not require local oscillator tuning and the proposed receiver (RX) can switch channels in less than 25 ns. The RX chip operates over a frequency range of 100 MHz–1.4 GHz and demonstrates an out-of-band rejection of 49 dB and a measured RX sensitivity of −86 dBm, which is the lowest measured for $N$ -path-based RXs. The chip was fabricated in a 45-nm RF silicon-on-insulator (SOI) CMOS process and occupies an active area of 0.55 mm2 with the power consumption of 23.1 mW when operating at 1 GHz. The chip performance is verified with over-the-air measurement of two transmitted signals 80 MHz apart that are received simultaneously with a 10-MHz analog-to-digital converter (ADC) at an error vector magnitude (EVM) around −20 dB. The measured dynamic range for EVM less than −20 dB is better than 86 dB for a QPSK constellation.