A quantum-based building block for designing a nanoscale full adder circuit with power analysis

Abstract

Quantum-dot cellular automata (QCA) concentrates charges using the Coulomb interaction. Despite the nanometric scale and the extremely high projected working frequency, the need for transmission is eliminated, resulting in very low power consumption. Few designs exist to reduce energy consumption and provide simple access to inputs and outputs. There have been few studies on the optimizations of majority and inverter gates for different types of adders. The design of adders using a QCA framework is becoming more significant in current research. This work aims to design a multi-layered full adder architecture that uses three-input XOR and a majority gate for the QCA framework. The primary goal of this article is to design a circuit with low power consumption and easy access to inputs and outputs. For a full adder by the QCA technology, a minimum clock zone of two clocks and 18 QCA cells by high compaction (0.02 μm2) are obtained. Additionally, the synthesis of high-level logic establishes the design's utility. In comparison to traditional design methodologies, experimental results show considerable design level gains in terms of circuit area, cell count, power, and clock. Experiments show how the design level has significantly improved compared to traditional design methodologies regarding circuit area, cell count, power, and clock.