Abstract
A rail-to-rail operational amplifier is designed with minimum variation in the input stage transconductance (gm) in standard 0.18μm CMOS technology. In this design, transconductance is maintained approximately constant independent of the operation region of the input transistors (i.e., saturation or weak inversion regions). Unlike conventional methods in rail-to-rail designs in which two complementary differential pairs are used, in this work, by using a single input pair, the sensitivity to mismatches between PMOS and NMOS input transistors is eliminated. A Monte-Carlo simulation with n=300 was run to ensure mismatch insensitivity. Simulation results show that the input stage transconductance deviation as the input common-mode voltage varies from rail-to-rail is less than ±0.81%, in typical conditions and at 27°C. When the temperature varies from −20°C to 120°C, the variation does not exceed ±1.28%. Furthermore, the variations of gm in two long-channel (L=1µm) and short-channel (L=0.18µm) cases are ±0.85% and ±0.9%, respectively. This proves that the introduced circuit works properly regardless of the channel length of the input pair.
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