Abstract
A low temperature coefficient voltage reference circuit for a 16-bit successive-approximation-register analog-digital-converter (SAR ADC) is presented in this paper. Including high-order compensation technique, logarithmic compensation technique and power supply rejection ratio (PSRR) enhancement technique are applied to this design. In addition, in order to pursue better temperature coefficient and output voltage accuracy, three kinds of trimming methods have applied to this design. This proposed design was implemented in a standard 55 nm CMOS process, the simulation results have shown temperature coefficient(TC) as low as 3.3 ppm/°C over a temperature range of 165°C (- 40°C to 125°C), the line regulation at room temperature is only 3.5 ppm/V, the circuit performs a PSRR property of 120dB@lkHz.
Published Version
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