Abstract
Mobile communication systems, such as IMT-2000, adopt turbo codes because they provide reliable, bandwidth-efficient communication over AWGN channels. The BER of turbo codes is close to the Shannon limits. As a mobile communication device can use only a limited power supply, use of low power design techniques is essential for successful device implementation. This paper proposes an architecture for the turbo decoder which adopts a fast decoding structure by initial threshold setting such that the number of decoding iterations can be reduced without BER performance degradation. The proposed decoding structure can be easily modified for other MAP decoders by employing a simple decision module. The initial iteration threshold has been decided via simulations by varying decoder parameters (mean/normalized-variance of the log-likelihood ratio; BER of the decoder outputs). Performance validations for the proposed decoder have been performed under the IMT-2000 high-speed data transmission testbed with the channel characteristic being set to BER=10/sup -6/. Simulation results show 55%-90% reductions in the number of decoding iterations when compared with conventional turbo decoders with a fixed number of iterations.
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