A novel STI etching technology to mitigate an inverse narrow width effect, and improve device performances for 90 nm node and beyond CMOS technology

Abstract

A new STI (shallow trench isolation) with automatic top corner rounding (ATCR) to improve 90 nm CMOS narrow width device performance has been studied in detail. Experimental results show that the ATCR mitigates the inverse narrow width effect, and increases the driving current (Idsat) by 8% together in a unit process step, thus getting easy process control and cost down benefits, which cannot be achieved through conventional methods. Additionally, the ATCR attained a better trench depth uniformity, and thus a wider process window (20–50 s) than that of the conventional method. Furthermore, the technique does not degrade the gate oxide integrity and junction leakage current; thus the developed ATCR STI technique is more suitable for 90 nm and beyond narrow width CMOS technologies.