Abstract

For first time, we report a novel deep sub-micron fully-depleted silicon-on-insulator metal–oxide–semiconductor field-effect-transistor (FD SOI MOSFET) where the channel layer consists of two sections with a step doping (SD) region in order to increase performance and reliability of the device. This new structure that called SD FD SOI structure (SDFD-SOI MOSFET), were used for reaching suitable threshold voltage upon device scaling and reliability improvement. We demonstrate that the electric field was modified in the channel and common peak near the source junction have been reduced in the SDFD-SOI structure. The device demonstrates large enhancements in performance areas such as current drive capability, output resistance, hot-carrier reliability and threshold voltage roll-off. It was found that the device performance is very much dependent upon the SD region parameters. Simulation results show that the proposed structure improved on/off current ratio, and saturated output characteristics compared with conventional SOI structure (C-SOI MOSFET). Also, it was shown that substrate current of SDFD-SOI MOSFET is much lower than the C-SOI MOSFET which presented the lower hot-carrier degradation in proposed MOSFET. Results show that the most short-channel problems in very large scale integrated circuits (VLSI) could be solved and the proposed SDFD-SOI MOSFETs can work very well in deep sub-micron and nanoscale regime.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.