Abstract
A novel-high density electrically erasable and programmable read only memory (EEPROM) cell technology is proposed. The new cell utilizing a polysilicon-gate hole (POLE) structure can be used to reduce the channel length and the substrate current I sub by 2 orders of magnitude in comparison with a conventional stacked-gate flash cell by isolating the charge transfer region and thus strongly reducing band-to-band tunneling current. A 36 µm2 cell, which is 20% smaller than that of a floating gate tunnel oxide (FLOTOX) type EEPROM, with a 0.6 µm design rule can be realized. Furthermore, stable write and erase (W/E) operations are confirmed, and the characteristics of 1 million W/E cycles and 10-year data retention have been achieved.
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