Abstract
Insuring data reliability on NAND Flash Memory is an important research issue. As adopting a very powerful error-correcting code gradually becomes a strategic demand for the endurance of nowadays NAND Flash memory, Low Density Parity Check (LDPC) codes are recently proposed due to their outstanding error correcting capability. In this paper, a novel Channel Coding Scheme concatenated LDPC with BCH NAND Flash Memory is proposed. Firstly a particular LDPC code with low error floor is constructed and BCH codes are used to generate soft information for LDPC codes. Simulation showed that the proposed Channel Coding Scheme obtains the benefit of both overcoming difficulties of soft information generation and the compatiblity with existing BCH code. With the low error floor of constructed LDPC codes, the proposed Channel Coding Scheme can increase P/E cycles of NAND flash memory more significantly comparing the BCH code.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
