A novel 4H-SiC MOSFET for low switching loss and high-reliability applications

Abstract

A novel 1200 V 4H-SiC MOSFET, which features a current spreading layer, a split-gate and a central P+ implant in the junction field effect transistor region (CSI-MOSFET), is proposed. The CSI-MOSFET achieves a better trade-off among specific on-resistance, maximum electric field in gate oxide and switching loss. The CSI-MOSFET is comprehensively optimized with numerical simulation, and then two kinds of CSI-MOSFETs (FCSI-MOSFET and GCSI-MOSFET with a floating/grounded central P+ implant) are further investigated. Compared with the conventional double implanted MOSFET (VDMOSFET), both FCSI-MOSFET and GCSI-MOSFET demonstrate a smaller on-resistance, and a smaller gate charge. Moreover, a maximum electric field in the gate oxide of 0.92 MV cm−1 is realized in GCSI-MOSFET, without breakdown voltage degradation. To our best knowledge, it is the lowest electric field among those reported on 1200 V SiC MOSFETs. For dynamic characteristics, the FCSI-MOSFET has the largest switching loss and the largest on-state voltage drop, due to the negative charges stored in the floating P+ implant region. On the contrary, the GCSI-MOSFET achieves the same low switching loss as that of the split-gate MOSFET with an extreme short gate length (0.2 μm), because there is no charge in the grounded P+ implant region. Therefore, the GCSI-MOSFET is far superior for low switching loss and high-reliability applications.