A novel 0.5- mu m n/sup +/-p/sup +/ poly-gated salicide CMOS process

J.R Pfiester,J.R Yeargain,M.S Swenson,J.R Alvis

doi:10.1109/16.43662

A novel 0.5- mu m n/sup +/-p/sup +/ poly-gated salicide CMOS process

J.R Pfiester, J.R Yeargain + Show 2 more

https://doi.org/10.1109/16.43662

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Journal: IEEE Transactions on Electron Devices	Publication Date: Nov 1, 1989
Citations: 3

Affiliation: Motorola (United States)

#Lightly Doped Drain #Low Junction Leakage + Show 8 more

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Abstract

A novel salicided twin-tub 0.5- mu m CMOS process using germanium implantation is presented. n/sup +/ and p/sup +/ dopants are implanted after salicide formation to fabricate devices with low junction leakage and low silicide-to-diffusion contact resistance. Germanium implantation prior to silicide formation is used to control short-channel transistor characteristics. A significant reduction in the lateral n/sup -/ and p/sup -/ diffusion is observed for germanium-implanted LDD (lightly doped drain) MOSFETs, resulting in minimized overlap capacitance as well as improved short-channel behavior.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>

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