A new watermarking scheme on scan chain ordering for hard IP protection

Abstract

Constraint-based watermarking has been proven as an effective means for hardware intellectual property (IP) protection. Scan chain further facilitates field authentication of the watermarks embedded in densely integrated IP cores and serves as an added layer of tamper-evident protection if it is also watermarked. In this paper, we propose a new scan-chain based watermarking scheme that can be used standalone as a reasonably robust copyright protection of hard IP core. During the process of scan chain ordering for test power optimization, the watermark bits constrain the cost of one connection style over the other for certain pairings of scan cells in the minimization process depending on the output of the IP core under the chosen test vector for watermark verification. Thus, the watermark is better obfuscated since both connection styles are possible to be selected at the watermarked locations. Typical attack scenarios are discussed and our experimental results show that strong authorship can be achieved with low overhead on test power incurred.