Abstract

To improve the performance and reliability of deep submicron metal-oxide-semiconductor (MOS) devices, we propose a gate-recessed metal-oxide-semiconductor field-effect transistor (GR-MOSFET) which has a selectively halo-doped recessed channel and a deep graded source/drain formed without counter-doping. The GR-MOS structure eliminates the tradeoff between drain-induced barrier lowering (DIBL) and hot carrier effect which are most important in deep submicron device design. It also reduces the V T lowering effect and lateral electric field at the drain. The fabricated 0.25 µm GR-MOSFET with a 10 nm gate oxide has exhibited 15% higher transconductance, more than 20% increased saturation current at V D=V G=3 V, 1 V higher BV DSS and 6 times less substrate current compared with a LDD-MOSFET of same device dimension.

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