Abstract
From January 2001 all lighting products on the European market had to be IEC 61000-3-2 compliant. The IEC 61000-3-2 standard sets limits on the 3rd and 5th harmonic input current as well as the conduction angles. Low power lighting products were not initially compliant to the new standard because the value of the DC bus capacitor was too high. Choosing a very low capacitor value is not advisable as it increases the lamp current crest factor and reduces the life of the product. Therefore, selection of the capacitor value is a trade off between the lamp current crest factor and the level of input current distortion. This paper presents two simple mathematical tools to determine the capacitor value to meet the IEC 61000-3-2 specifications and to predict the performance of the CFL lamp for a given input voltage and lamp power. Based on mathematical modeling, two mathematical tools have been developed. The first mathematical tool determines the maximum capacitor value that satisfies IEC 61000-3-2 requirement for low power lighting products. Based on the capacitor value selected by the first mathematical tool, the second mathematical tool determines the magnitudes of the third and fifth harmonic in the input current, conduction angles, power factor, THD and a DC bus crest factor. The two mathematical tools proposed in this paper are the simplest and cheapest ways to meet the IEC 61000-3-2 standard and predict the performance of the lamp. More important the proposed tool can be widely used for all low power lighting products in the countries where IEC 61000-3-2 has not yet been introduced. By using the proposed method the cost of an electronic ballast is reduced and the power quality significantly improved. By reducing the capacitor value, the lamp current crest factor is slightly increased but it is still acceptable for CFLs. Results obtained from the proposed mathematical tools have been validated with experimental results for 9, 15 and 23 W lamps.
Published Version
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