Abstract

A novel BIST (built-in self-test) design that detects stuck-at, stuck-on, stuck-open, and bridging faults in CMOS PLAs (programmable logic arrays) is presented. I/sub DDQ/ testing is used for detecting bridging faults. The overhead is comparable to that of existing BIST schemes. The testing can be performed at normal system speed. A PLA-size-independent BIST controller was implemented and tested on a number of industrial PLAs.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.