Abstract
Abstract This paper presents a novel reduced switch multilevel inverter based on switched capacitor technique for grid integration. It generates nine-level output voltage waveform with only 10 switches. It is suitable for high gain applications since it has a boosting ability of four times. Another feature is that the capacitors have built-in self-voltage balancing. The level shifted pulse width modulation (LSPWM) technique is used to explore the performance of the proposed topology. To determine its optimal performance, the suggested topology is compared to the state-of-the-art topologies in the literature. Simulation of the proposed topology is done under different parameter variations. Further, the thermal design of the proposed topology is done using PLECS software to find the efficiency. Finally, the hardware prototype is implemented using dSPACE 1104 controller to verify its performance.
Published Version
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