Abstract
This paper proposes a new 8T nonvolatile SRAM (nvSRAM) cell employing ULP FinFETs and ferroelectric FinFETs to enable energy-efficient and low-latency store/recall operations. Different from other types of nvSRAM requiring additional circuitry or nonvolatile memories connected to a standard 6T SRAM cell to achieve nonvolatility, the proposed hybrid nvSRAM cell reduces the area penalty by embedding the nonvolatile ferroelectric FinFETs in a 6T SRAM cell without sacrificing the cell stability, read/write performance and power consumption.
Highlights
In order to realize the ultra-low power computing near memory system, a compact and fast embedded nonvolatile memory is expected to be important [1], [2]
The additional two ferroelectric capacitors enabling the nonvolatility lead to a large area penalty compared with using transistors
We propose a new 8T hybrid nonvolatile SRAM (nvSRAM) cell employing FinFETs and ferroelectric FinFETs to achieve energy-efficient data storage with reduced area overheads
Summary
WEI-XIANG YOU 1, PIN SU 1 (Member, IEEE), AND CHENMING HU 2,3 (Life Fellow, IEEE) This work was supported in part by the “Center for Semiconductor Technology Research” from the Featured Areas Research Center Program within the Framework of the Higher Education Sprout Project by the Ministry of Education in Taiwan, and in part by the Ministry of Science and Technology, Taiwan, under Contract MOST-108-3017-F-009-003 and Contract MOST-107-2221-E-009-090-MY2.
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