Abstract

This letter describes the analysis, design, and measured results of a fully integrated single-pole double-throw (SPDT) switch developed in 0.25-μm silicon- germanium (SiGe) BiCMOS process technology, which features SiGe HBTs with peak fT/fmax of 110/180 GHz. The switch is designed based on a shunt-shunt topology with a combination of various design and layout optimization approaches to improve the insertion loss (IL), isolation, and power handling capability. The designed switch including the applied techniques results in a measured IL of 2.3 dB and isolation of 32 dB at 8 GHz. The switch is able to attain a state-of-the-art input referred 1-dB compression point (IP1 dB) up to 30 dBm while drawing a current of 3 mA from a 6 V supply. The die has an area of only 775 μm × 820 μm. To the author's knowledge, the presented work is the first SPDT switch ever reported, that incorporates slow-wave transmission lines and reverse-saturated heterojunction bipolar transistors at the specified frequency range.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.