A multiple-event propagation model in near-threshold combinational circuits using neural networks

Abstract

Near-threshold computing (NTC) is a promising technique to reduce the power consumption of very large-scale integration (VLSI) designs. The continuous reductions in the supply voltage present reliability challenges for modern complementary metal–oxide–semiconductor (CMOS) logic due to the occurrence of soft errors from single-event transients (SETs) and multiple-event transients (METs). A fast yet accurate neural network-based model is presented herein to calculate the soft error rate (SER) in circuits in the near-threshold voltage domain. Recurrent neural networks (RRN) are used to model each gate in a given library. A heuristic method for locating multiple faults and propagating them to the circuit outputs based on these neural network models is also presented. On average, the experimental results show that the SER can be estimated up to 20 times faster compared with HSPICE simulations, with less than 0.2% accuracy loss.