Abstract

With the emerging nanoscale CMOS technology, Multiple Event Transients (METs) originated from radiation strikes are expected to become more frequent than Single Event Transients (SETs). In this paper, a fast and accurate layout-based Soft Error Rate (SER) estimation technique with consideration of both SET and MET fault models is proposed. Unlike previous techniques in which the adjacent MET sites are obtained from logic-level netlist, we perform a comprehensive layout analysis to extract MET adjacent cells. It is shown that layout-based technique is the only effective solution for identification of adjacent cells as netlist-based techniques significantly underestimate the overall SER.

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