Abstract
We present the design of a prototype MAPS sensor MIC6_V1 based on a 55 nm Quad-well CMOS Image Sensor process for the CEPC vertex detector. A new node-based, data-driven, parallel readout architecture is implemented to achieve high spatial resolution, fast readout, and low power consumption. The size of MIC6_V1 is 2.8 mm × 2.8 mm, which contains a pixel matrix of 64 rows by 64 columns, and the pixel size is 23.6 μ m × 20 μ m. The integration time is 5 μs, and the hit arrival time measurement accuracy is 10 ns.
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