Abstract

The Circular Electron Positron Collider (CEPC) is proposed as a Higgs factory for precision measurement of properties of the Higgs boson. The CEPC vertex detector requires low material budget, high spatial resolution, fast readout and low power consumption. Monolithic Active Pixel Sensor (MAPS), as one of the promising candidate technologies, has been studied within the R&D activities for the CEPC vertex detector. This proceeding introduces recent development of a MAPS prototype using the TowerJazz 180 nm CMOS Image Sensor process. Two different binary front-end circuits have been designed to explore an in-pixel front-end structure suitable for a compact pixel in combination with an in-matrix sparsified readout circuitry. To achieve high granularity together with fast readout speed, a new architecture of asynchronous data-driven matrix readout has been implemented. The prototype contains 128 rows and 64 columns featuring a small pixel pitch of 25μm. The address of one hit pixel can be read out in 25 ns. This work presents the design of the prototype, which is currently under test.

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