Abstract

This paper presents stability analysis of large-scale SRAM arrays directly after terminating NBTI stress. While the impact of static NBTI is well examined, the fast-recovering component was not yet measured on SRAM arrays. The novel method presented here analyzes the flipping of cells directly after the supply voltage was lowered to a specific value where the structure is most sensitive for NBTI induced cell flips. Thus, read margin criterion is used to characterize the decreasing cell stability due to NBTI degradation with a resolution down to 1ms. Applying this method, the impact of static and dynamic NBTI is measured on a 1 MBit product-like SRAM array fabricated in a 65nm low power CMOS technology.Between 1ms and 10.000s after stress, the NBTI induced number of cell flips decreases by about one third. Many hours later, the number of flips reduces to about one half of the initial cell flips at 1ms after end of stress.

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