Abstract

This paper presents a new gate driver integrated by In-Zn-O thin-film transistors (IZO TFTs) with the etch stop layer (ESL) structure, in which only a single negative power source is used on account of a new boosting module. The boosting module is controlled only by the VIN signal for generating a lower level than VSS. The proposed gate driver with 15 stages is fabricated through the IZO TFT process on a glass substrate to verify its function. The experiment results showed that the proposed gate driver can successfully output full-swing waveforms with resistive load RL=2 kΩ and capacitive load CL=30 pF at the 16.7 and 66.7 kHz clock frequencies, and can also output as small as 3.2 μs pulse width with little distortion, revealing good stability.

Highlights

  • Thin-film transistors (TFTs) are the key to implementing active-matrix flat panel displays (FPDs), such as the active-matrix organic light-emitting diode (AMOLED) or the thin-film transistor liquid crystal display (TFT LCD)

  • Unlike a-Si:H or low-temperature polysilicon (LTPS) TFTs, Metal oxide TFTs (MOTFTs) generally operates in depletion mode, and there will be considerable leakage current when the gate source voltage is zero [6,7]

  • This paper proposes a new gate driver integrated by MOTFTs, which employs a single negative power source realized by a simple boosting module

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Summary

Introduction

Thin-film transistors (TFTs) are the key to implementing active-matrix flat panel displays (FPDs), such as the active-matrix organic light-emitting diode (AMOLED) or the thin-film transistor liquid crystal display (TFT LCD). This paper proposes a new gate driver integrated by MOTFTs, which employs a single negative power source realized by a simple boosting module. The VIN signal is directly connected to C1, which causes node Qb to become a more negative voltage through the capacitor coupling effect, while in [14], the lower voltage generated by the negative voltage generating module cannot hold for a sufficiently long time due to a few leakage current paths. The simulation results showed that the proposed gate driver could work well with a single negative power source. The voltage of Qb, has less time to leak with the increase in clock frequency It may remain lower than VSS at the negative threshold voltage condition.

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