A Low-Power, Digitally-Controlled, Multi-Stable, CMOS Analog Memory Circuit

Abstract

This paper presents a digitally-controlled, CMOS analog memory circuit that provides several analog stable operating points based on the laddered inverter quantizer (LIQAF) circuit. Two input digital pulses set the stored analog level by moving the stable operating point up or down through charging or discharging the output node, respectively. The proposed circuit achieves its stable operating levels through nonlinear, continuoustime feedback using only a single supply voltage. We present SPICE simulation results for an 8-level version of the multistable circuit in a 65 nm CMOS process. The results demonstrate that the proposed circuit can operate at low-power consumption from a wide range of supply voltages with robust operation across process and temperature variations. The proposed circuit has the potential to be integrated into the grid array of analog neural networks.