Abstract
Ripple-carry adder (RCA) is among the most common type of adder. However, it is not preferred in many applications because of its high latency. In this paper, two architectures of high-speed parallel RCA (PRCA) along with fault detection and localization are proposed, with reduced overhead as compared with carry look-ahead adder (CLA). In the proposed approach, RCA is divided into blocks, where the initial carry input for each block will be generated by a carry look-ahead logic unit. The delay is reduced by 43.81% as compared with the conventional 64-bit RCA design. The delay is further reduced by replacing the last blocks with a single RCA-based CSeA design and becomes equal to CLA if the last three blocks are replaced with CSeA. The proposed 64-bit design of PRCA and PRCA-CSeA requires 20.31% and 22.50% area overhead as compared with the conventional RCA design. Whereas, the delay-power-area product of our proposed designs is 24.66%, and 30.94% more efficient than conventional RCA designs. With self-checking, the proposed architecture of PRCA and PRCA-CSeA with multiple-fault detection requires 42.36% and 44.35% area overhead as compared with a 64-bit self-checking RCA design.
Highlights
Electronics 2021, 10, 1791. https://doi.The implementation of digital circuits at the very deep submicron level is achieved with the risk of losing reliability because of the complexity, thermal cycling, and limited power supplies [1]
The comparison results for this parallel RCA (PRCA)-carry-select adder (CSeA) design are obtained for three cases
For the PRCA-CSeA combination, the simulation results are obtained for case three, which has similar latency to that of carry look-ahead adder (CLA)
Summary
The implementation of digital circuits at the very deep submicron level is achieved with the risk of losing reliability because of the complexity, thermal cycling, and limited power supplies [1]. To address this issue, the concept of complete self-checking was introduced, in which a circuit should either remain unaffected by the fault or detect the fault as soon as it occurs [2]. In Moradian et al [8], a self-checking and self-repairing radix-2 signed digit adder is presented in which fault localization is achieved by restricting the propagated carry to the adder block
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