Abstract

This paper presents a highly linear and power backoff (PBO) efficiency enhanced Doherty power amplifier (PA). Our PA uses multigated transistors (MGTR) in the main PA and second harmonic control circuits at the outputs of the main and auxiliary PAs for PA linearization. The proposed topology significantly improves the linearity of the PA by suppressing its third-order intermodulation distortion (IMD3). The 5.8GHz Doherty PA was implemented in a 55nm bulk CMOS process. The measurement results show a 1.8% EVM with 17dBm average $\mathbf{P}_{\mathbf{o}\mathbf{ut}}$ and a 5.3% average PAE using 80MSymbol/s 256-QAM modulation signal without any digital pre-distortions (DPD).

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