A High Level Synthesis System for VLSI Image Processing Applications

François S Verdier,Bertrand Zavidovique

doi:10.1155/1998/95421

Abstract

We present a VLSI synthesis environment dedicated to the design of image processing architectures. The environment includes a “front-end” data-flow emulator for validation of the algorithms and the RTL-synthesis system called ALPHA. The latter implements a stochastic search in the design space and produces efficient solutions considering the “restricted” domain of concerned applications. Two simulated Annealing (SA) algorithms run in sequence for data-path synthesis (scheduling and module selection) and then for control synthesis and data-path completion (binding). An interesting feature of the first optimization is the use of the data-flow graph regularity to predict the control influence in terms of the future design. A few designs have already been compiled under this environment including a default detector presented here.

Highlights

Today’s demand for both high performance and severely constrained machine vision functions leads to an ever increasing diversification of algorithms while design cycles get shorter
By designing a new architecture, based on a new formalism for its description, we have found a way for an easy mapping of a functional behavioral description onto computing devices
A high level synthesis system oriented towards Image Processing applications has been presented

Summary

Introduction

Today’s demand for both high performance and severely constrained machine vision functions leads to an ever increasing diversification of algorithms while design cycles get shorter. The computing power of general purpose micro-processors and DSPs is dramatically increasing it still is surprisingly difficult to find a good enough (in terms of performance, real-time execution, memory sizes...) match between a complex Image Processing algorithm and any such traditional architectural target. This is mainly due to the topological diversity of both computing devices and behavioral descriptions. The need for a single formalism describing concurently what a function does (the behavioral description) and how it can be

Methods

Results

Conclusion