A Gated Diode DRAM Cell for Improved Power and Speed

Abstract

In this paper performance analysis of Gated diode based Dynamic Random Access Memory (GD-DRAM) cell is compare with capacitor based DRAM cell in terms of average power dissipation, propagation delay, read access time and write access time at 250nm technology. The GD-DRAM is also referred as capacitorless DRAM. This gated diode stored data in DRAM which is an alternative solution to capacitor. This gated diode DRAM shows cutback in leakage and access time as compared to capacitor based DRAM. A gated diode is formed by shorting two terminal of MOS transistor i.e. source and drain. When the voltage Vgs is higher than knee voltage Vth; then data get stored on it. Nowadays dynamic random access memory is highly attracting market as compared static RAM because of its high package density, low cost and small area. In this paper this gated diode also resolves the issue of fabrication of capacitor in conventional DRAM cell. The major problem associated with DRAM is power dissipation. The above cells were designed and simulated in Tanner EDA tool and their results were analyzed at 250μm technology. Here we investigated that gated diode based DRAM has superior performance in terms of read time, write time and average power dissipation.