Abstract

A 5.75-GHz variable gain Low Noise Amplifier (LNA) using 0.18 /spl mu/m CMOS process is described. A novel gain control technique is proposed which does not affect the matching at the input and output and the gain flatness of the LNA when the gain is varied. Usage of Gain control to achieve low noise figure and high IIP3 simultaneously without increasing the power consumption is demonstrated. Another feature of this LNA is that it also acts as an active balun for converting the single-ended input to a differential output. The LNA does not need any off-chip components and is matched to 50-Ohm. Measured results of this LNA in commercial SOC-16 package include a gain of 21 dB, noise figure of 4.4 dB, gain variation of 10.5 dB and an IIP3 of -6.5 dBm. It draws 9 mA from 1.8 V power supply. The chip area excluding the pads is 0.5 mm /spl times/ 0.6 mm.

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