A Fully-integrated Highly Efficient CMOS Class-E Power Amplifier Using Cascode Class-E Drivers for WLAN Applications

Abstract

This paper presents a modified class-E single-ended power amplifier (PA) for WLAN application. The proposed class-E PA consisting of two stages, all driver stages adopts bias voltage technique to simplify the structure and improves RF performance. The driver stage adopts the forward body bias technique to lower threshold voltage and realize high efficiency with low operation voltage; the power stage utilizes cascode topology with a self-biasing voltage technique to reduce device stress. The proposed PA is simulated by cadence IC in TSMC 0.18-μm CMOS technology. With a 2.3 V supply voltage, the fully integrated CMOS PA achieves maximum output power of 27.8 dBm and power-added efficiency (PAE) of 48.3% at 2.4GHz. It achieves high power gain of 31.5 dB and large output power with low input signal. The chip area of the proposed class-E PA is 0.90 mm2.