Abstract
Finite State Machine (FSM) is an important element in digital systems design and in the design of VLSI systems. In any digital system which is not purely combinational, FSM design is essential. The FSM comprises of combinational logic with both independent and output dependent inputs. Some outputs from the combinational logic are fed back to the input side in order to generate the required number of finite states (there may be outputs which are not fed back). This article describes the FSM compiler implemented at CEERI's VLSI Design Centre and the associated simulator. The input to the FSM compiler is in an easy-to-use FSM description language. The simulator for the FSM is transition-table driven. The novel feature of the simulator is that it allows the user to define an output command dictionary which aids the system designer's job of debugging and testing the command outputs of the FSM.
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